85108 Overview
Description
The 85108 is a low skew, high performance 1-to-8 Differential-to-0.7V HCSL Clock Distribution Chip. The 85108 CLK, nCLK pair can accept most differential input levels and translates them to 3.3V HCSL output levels.
Key Features
- Eight 0.7V differential HCSL clock output pairs
- CLK/nCLK input pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
- Maximum output frequency: 500MHz
- Additive phase jitter, RMS: 0.09ps (typical)
- Output skew: 80ps (maximum)
- Part-to-part skew: 400ps (maximum)
- Propagation delay: 3ns (maximum)
- Full 3.3V operating supply
- 40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS
