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85108 - Differential-to-0.7V HCSL Clock Distribution Chip

Description

The 85108 is a low skew, high performance 1-to-8 Differential-to-0.7V HCSL Clock Distribution Chip.

The 85108 CLK, nCLK pair can accept most differential input levels and translates them to 3.3V HCSL output levels.

Features

  • Eight 0.7V differential HCSL clock output pairs.
  • CLK/nCLK input pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL.
  • Maximum output frequency: 500MHz.
  • Additive phase jitter, RMS: 0.09ps (typical).
  • Output skew: 80ps (maximum).
  • Part-to-part skew: 400ps (maximum).
  • Propagation delay: 3ns (maximum).
  • Full 3.3V operating supply.
  • -40°C to 85°C ambient operating temperature.
  • Av.

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Datasheet preview – 85108

Datasheet Details

Part number 85108
Manufacturer Renesas
File Size 670.74 KB
Description Differential-to-0.7V HCSL Clock Distribution Chip
Datasheet download datasheet 85108 Datasheet
Additional preview pages of the 85108 datasheet.

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Full PDF Text Transcription

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Low Skew, 1-to-8, Differential-to-0.7V HCSL Clock Distribution Chip 85108 DATA SHEET General Description The 85108 is a low skew, high performance 1-to-8 Differential-to-0.7V HCSL Clock Distribution Chip. The 85108 CLK, nCLK pair can accept most differential input levels and translates them to 3.3V HCSL output levels. The 85108 provides a low power, low noise, low skew, point-to-point solution for distributing HCSL clock signals. Guaranteed output and part-to-part skew specifications make the 85108 ideal for those applications demanding well defined performance and repeatability. Features • Eight 0.
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