Datasheet4U.com

854S006 - Differential-to-LVDS Fanout Buffer

Product Overview

Renesas

📥 Download Datasheet

854S006 Differential-to-LVDS Fanout Buffer by Renesas - Datasheet Preview — Datasheet preview – 854S006

Datasheet Details

Part number	854S006
Manufacturer	Renesas
File Size	1.04 MB
Description	Differential-to-LVDS Fanout Buffer
Datasheet	854S006 Datasheet
Additional preview pages of the 854S006 datasheet.

Product details

Description

The 854S006 is a low skew, high performance 1-to-6, Differential-to-LVDS fanout buffer.

Features

Six differential LVDS outputs.
One differential clock input pair.
CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL.
Maximum output frequency: 1.7GHz.
Translates any single-ended input signal to LVDS levels with resistor bias on nCLK input.
Output Skew: 55ps (maximum).
Propagation delay: 850ps (maximum).
Additive phase jitter, RMS: 0.067ps (typical).
Full 3.3V or 2.5V supply.
-40°C to 85°C ambien.

📁 Similar Datasheet

854S006I - Differential-to-LVDS Fanout Buffer (IDT)
854S057B - 4:1 or 2:1 LVDS Clock Multiplexer (IDT)
8540 - Numeric Displays (Excel)
8540xxx - Numeric Displays (Excel)
854651 - Low-Loss filter (Sawtek)
854654 - Low-Loss Filter (Sawtek)
854655 - Low-Loss Filter (Sawtek)
854657 - Bandpass filter (Sawtek)

Other Datasheets by Renesas

854S01I - 2:1 Differential-to-LVDS Multiplexer
854S057 - 4:1 or 2:1 LVDS Clock Multiplexer
854S057B - 4:1 or 2:1 LVDS Clock Multiplexer

Published: Aug 6, 2020 |