854S057B
Description
The 854S057B is a 4:1 or 2:1 LVDS Clock Multiplexer which can operate up to 2GHz. The PCLK, n PCLK pairs can accept most standard differential input levels. Internal termination is provided on each differential input pair. The 854S057B operates using a 2.5V supply voltage. The fully differential architecture and low propagation delay make it ideal for use in high speed multiplexing applications. The select pins have internal pulldown resistors. Leaving one input unconnected (pulled to logic low by the internal resistor) will transform the device into a 2:1 multiplexer. The SEL1 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 00 selects PCLK0, n PCLK0).
Features
- High speed differential multiplexer. The device can be configured as either a 4:1 or 2:1 multiplexer
- One LVDS output pair
- Four selectable PCLK, n PCLK inputs with internal termination
- PCLKx, n PCLKx pairs can accept the following...
