Datasheet Details
| Part number | 894D115I-04 |
|---|---|
| Manufacturer | Renesas |
| File Size | 402.23 KB |
| Description | Clock/Data Recovery |
| Datasheet |
 894D115I-04 Datasheet
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General Description
The 894D115I-04 is a clock and data recovery circuit.
The device is designed to extract the clock signal from a NRZ-coded STM-4 (OC-12/STS-12) or STM-1 (OC-3/STS-3) input data signal.
The output signals of the device are the recovered clock and retimed data signals.
Key Features
- Clock recovery for STM-4 (OC-12/STS-12) and STM-1 (OC-3/STS-3).
- Input: NRZ data (622.08 or 155.52 Mbit/s).
- Output: clock signal (622.08MHz or 155.52MHz) and retimed data signal at 622.08 or 155.52 Mbit/s.
- Internal PLL for clock generation and clock recovery.
- Differential inputs can accept LVPECL levels.
- Differential LVDS data and clock outputs.
- Lock reference input and PLL lock output.
- 19.44MHz reference clock input.