89HPES34H16 Datasheet | Renesas

Overview The 89HPES34H16 is a member of the IDT PRECISE™ family of PCI Express® switching solutions. The PES34H16 is a 34-lane, 16-port peripheral chip that performs PCI Express packet switching with a feature set optimized for high-performance applications such as servers, storage, and munications/networking. It provides connectivity and switching functions between a PCI Express upstream port and up to fifteen downstream ports and supports switching between downstream ports. Features - High Performance PCI Express Switch - Sixteen maximum switch ports - Up to three x8 ports that bifurcate up to six x4 ports - Ten x1 ports - Thirty-four 2.5 Gbps embedded Ser Des - Supports pre-emphasis and receive equalization on per-port basis - Low-latency cut-through switch architecture - Support for Max Payload Size up to 2048 bytes - Supports two virtual channels and eight traffic classes - PCI Express Base Specification Revision 1.1 pliant - Flexible Architecture with Numerous Configuration Options - Port arbitration schemes utilizing round robin algorithms - Automatic per port link width negotiation from x8 to x4 to x2 or x1 - Automatic lane reversal on all ports - Automatic polarity inversion on all lanes - Supports locked transactions, allowing use with legacy soft- ware - Ability to load device configuration from serial EEPROM - Ability to control device via SMBus - Highly Integrated Solution - Requires no external ponents - Incorporates on-chip internal memory for packet buffering and queueing - Integrates thirty-four 2.5 Gbps embedded full duplex Ser Des, 8B/10B encoder/decoder (no separate transceivers needed) - Reliability, Availability, and Serviceability (RAS) Features - Redundant upstream port failover capability - Supports optional PCI Express end-to-end CRC checking Block Diagram x8/x4/x2/x1 Ser Des DL/Transaction Layer x8/x4/x2/x1 Ser Des DL/Transaction Layer x8/x4/x2/x1 Ser Des DL/Transaction Layer Route Table Frame Buffer 16-Port Switch Core Port...