8A34045 Datasheet | Renesas

Overview The 8A34045 Two-Channel Universal Frequency Translator is a highly integrated timing device with two Digital PLL (DPLL) channels and six Digitally Controlled Oscillator (DCO) channels. The DPLLs can lock to external references or operate in free run, and can also be configured as DCOs. Each DCO can be synchronized by any of the DPLLs or they can operate in free run. The DCOs can alternatively be controlled by an external algorithm for Optical Transport Network (OTN) applications. Typical Applications - Core and access IP switches / routers - Synchronous Ethernet equipment - 10Gb, 40Gb, and 100Gb Ethernet interfaces - Wireless infrastructure for 4.5G and 5G network equipment - OTN Muxponders and line cards Features - Close-in phase noise plies with mon Public Radio Interface (CPRI) frequency synchronization requirements - Supports all ITU-T G.709 frequencies - Meets OTN jitter and wander requirements per ITU-T G.8251 - Two independent DPLL/DCO channels - Each can act as a frequency synthesizer, jitter attenuator, Digitally Controlled Oscillator (DCO), or Digital Phase Lock Loop (DPLL) - DPLL Digital Loop Filters (DLFs) are programmable with cut-off frequencies from 1.1Hz to 22k Hz - Generate output frequencies that are independent of input frequencies via a Fractional Output Divider (FOD) - Each FOD supports output phase tuning with 50ps resolution - Six independent DCO channels - Each DCO can act as an independent DCO or as a Satellite Channel - Satellite Channels are associated with a source DPLL or DCO to increase the number of independently programmable FODs and output stages available to the source channel - Each DCO generates an independent output frequency via a Fractional Output Divider (FOD) - 12 Differential / 24 LVCMOS outputs - Frequencies from 0.5Hz to 1GHz (250MHz for LVCMOS) - Jitter below 150fs RMS (10k Hz to 20MHz) - LVCMOS, LVDS, LVPECL, HCSL, CML, SSTL, and HSTL output modes supported - Differential output swing is selectable: 400m V / 650m...