8SLVP1212 Description
The 8SLVP1212 is a high-performance, 12 output differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP1212 is characterized to operate from a 3.3V and 2.5V power supply.
8SLVP1212 Key Features
- Twelve low skew, low additive jitter LVPECL outputs
- Two selectable, differential clock inputs
- Differential pairs can accept the following differential input
- Maximum input clock frequency: 2GHz
- LVCMOS interface levels for the control input (input select)
- Output skew: 33ps (maximum)
- Propagation delay: 550ps (maximum)
- Low additive phase jitter, RMS at fREF = 156.25MHz, VPP = 1V
- Full 3.3V and 2.5V supply voltage
- Device current consumption (IEE): 131mA (maximum)