9DB233 Description
The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards patible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking.
9DB233 Key Features
- 0.7V current mode differential HCSL output pairs
- OE# pins; suitable for Express Card