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9DB306 Datasheet Pci Express Jitter Attenuator

Manufacturer: Renesas

Overview: PCI Express Jitter Attenuator 9DB306 Data Sheet GENERAL.

Datasheet Details

Part number 9DB306
Manufacturer Renesas
File Size 375.38 KB
Description PCI Express Jitter Attenuator
Datasheet 9DB306-Renesas.pdf

General Description

The 9DB306 is a high performance 1-to-6 Differential-toLVPECL Jitter Attenuator designed for use in PCI Express™ systems.

In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer.

In these systems, a zero delay buffer may be required to attenuate high frequency random and deterministic jitter ponents from the PLL synthesizer and from the system board.

Key Features

  • Six differential LVPECL output pairs.
  • One differential clock input.
  • CLK and nCLK supports the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL.
  • Maximum output frequency: 140MHz.
  • Input frequency range: 90MHz - 140MHz.
  • VCO range: 450MHz - 700MHz.
  • Output skew: 135ps (maximum).
  • Cycle-to-Cycle jitter: 30ps (maximum).
  • RMS phase jitter @ 100MHz, (1.5MHz - 22MHz): 3ps (typical).
  • 3.3V operating supply.

9DB306 Distributor