Description
The 9DBL0255/9DBL0455 are 2 and 4-output PCIe Clock fan-out buffers for PCIe Gen1
5 applications.
Both parts have an open drain Loss of Signal (LOS) output to indicate the absence or presence of an input clock.
Features
- to aid robust designs. Flexible Power Sequencing (FPS) ensures well-defined behavior under various power up scenarios, while Power Down Tolerant (PDT) ESD protection allows input pins to be driven before VDD is applied. The 9DBL0255/9DBL0455 are spread-spectrum compatible and provide direct connection to 85Ω transmission lines. They can also be used in 100Ω environments with simple external series resistors. PCIe Architectures.
- Common Clocked (CC).
- Independent Reference Clock (SRIS, SR.
9DBL0455 Datasheet
