9DBV0231 Description
The 9DBV0231 is a member of Renesas’ 1.8V Very-Low-Power (VLP) PCIe family. The device has 2 output enables for clock management. Remended Application 1.8V PCIe Gen1 5 Zero-Delay/Fan-out Buffer (ZDB/FOB) Output.
9DBV0231 Key Features
- Two 1-200MHz Low-Power (LP) HCSL DIF pairs
- DIF cycle-to-cycle jitter < 50ps
- DIF output-to-output skew < 50ps
- PCIe Gen5 CC additive phase jitter < 40fs RMS
- 12kHz-20MHz additive phase jitter = 156fs RMS at
- LP-HCSL outputs; save 4 resistors pared to standard
- 35mW typical power consumption in PLL mode; reduced
- OE# pins; support DIF power management
- HCSL patible differential input; can be driven by
- Slew rate for each output