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9DBV0441 Datasheet PDF

Renesas Electronics 9DBV0441

The 9DBV0441 is a member of Renesas’ SOC-Friendly 1.8V Very-Low-Power (VLP) PCIe family. It has integrated output terminations providing Zo = 100 for direct connection to 100 transmission lines. The device has 4 output enables for clock management, and 3 selectable SMBus addresses.
Part No. 9DBV0441
Datasheet 9DBV0441 Download
Manufacturer
Renesas Electronics
Description 1.8V PCIe Gen1-4 ZDB/FOB
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9DBV0441 datasheet page 1 preview

DESCRIPTION

It has integrated output terminations providing Zo = 100 for direct connection to 100 transmission lines. Typical

APPLICATIONS

● 1.8V PCIe Gen1–5 Zero-Delay/Fan-out Buffer (ZDB/FOB) Output

FEATURES

● Four 1–200MHz Low-Power (LP) HCSL DIF pairs with ZO = 100 Key Specifications
● DIF cycle-to-cycle jitter < 50ps
● DIF output-to-output skew < 50ps
● PCIe Gen5 CC additive phase jitter < 40fs RMS
● 12kHz–20MHz additive phase jitter = 156fs RMS at 156.25MHz (typical) Block Diagram vOE(3:0)#

FEATURES

/Benefits
● Direct connection to 100 transmission lines; saves 16 resistors compared to standard HCSL outputs
● 53mW typical power consumption in PLL mode; minimal power consumption
● Spread Spectrum (SS) compatible; allows use of SS for EMI reduction
● OE# pins; support DIF power management
● HCSL compatible differential input; can be driven by common clock sources
● Programmable Slew rate for each output; allows tuning for various line lengths
● Programmable output amplitude; all...
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