Datasheet4U Logo Datasheet4U.com

9DML0451 - 2:4 3.3V PCIe Gen1-5 Clock Mux

Download the 9DML0451 datasheet PDF. This datasheet also covers the 9DML0441 variant, as both devices belong to the same 2:4 3.3v pcie gen1-5 clock mux family and are provided as variant models within a single manufacturer datasheet.

General Description

The 9DML0441 and 9DML0451 devices are 3.3V members of Renesas' Full-Featured PCIe family.

6 Common Clocked (CC), Separate Reference no Spread (SRnS), and Independent Reference (IR) clock architectures.

Key Features

  • Four 1.
  • 200MHz Low-Power HCSL (LP-HCSL) DIF pairs.
  • 9DML0441 default ZOUT = 100.
  • 9DML0451 default ZOUT = 85.
  • See AN-891 for easy termination to other logic levels Features.
  • Direct connection to 100 (xx41) or 85 (xx51) transmission lines saves up to 16 resistors.
  • 79mW typical power consumption.
  • Spread Spectrum Clocking (SSC) compatible.
  • OE# pins for each output.
  • HCSL-compatible differential inputs.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (9DML0441-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 9DML0451
Manufacturer Renesas
File Size 628.57 KB
Description 2:4 3.3V PCIe Gen1-5 Clock Mux
Datasheet download datasheet 9DML0451 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
2:4 3.3V PCIe Gen1–6 Clock Mux 9DML0441 / 9DML0451 DATASHEET Description The 9DML0441 and 9DML0451 devices are 3.3V members of Renesas' Full-Featured PCIe family. They support PCIe Gen1–6 Common Clocked (CC), Separate Reference no Spread (SRnS), and Independent Reference (IR) clock architectures. The parts provide a choice of asynchronous or glitch-free, gapped-clock switching modes, and offer a choice of integrated output terminations for direct connection to 85Ω or 100Ω transmission lines.