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9FGV0441 - 4-OUTPUT VERY LOW POWER PCIE GEN 1-4 CLOCK GENERATOR

General Description

The 9FGV0441 is an 4-output very low power clock generator for PCIe Gen 1, 2, 3 and 4 applications with integrated output terminations providing Zo = 100.

The device has 4 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.

Key Features

  • 4 0.7V low-power HCSL-compatible (LP-HCSL) DIF pairs with Zo=100.
  • 1 1.8V LVCMOS REF output with Wake-On-Lan (WOL) support Key Specifications.
  • DIF cycle-to-cycle jitter < 50ps.
  • DIF output-to-output skew < 50ps.
  • DIF phase jitter is PCIe Gen1.
  • 4 compliant.
  • REF phase jitter is < 1.5ps RMS Block Diagram Features/Benefits.
  • Integrated terminations provide 100 differential Zo; reduced component count and board space.
  • 1.8V.

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Datasheet Details

Part number 9FGV0441
Manufacturer Renesas
File Size 649.74 KB
Description 4-OUTPUT VERY LOW POWER PCIE GEN 1-4 CLOCK GENERATOR
Datasheet download datasheet 9FGV0441 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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4-OUTPUT VERY LOW POWER PCIE GEN 1–4 CLOCK GENERATOR DATASHEET 9FGV0441 Description The 9FGV0441 is an 4-output very low power clock generator for PCIe Gen 1, 2, 3 and 4 applications with integrated output terminations providing Zo = 100. The device has 4 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off. Recommended Application PCIe Gen1–4 clock generation for Riser Cards, Storage, Networking, JBOD, Communications, Access Points Output Features • 4 0.7V low-power HCSL-compatible (LP-HCSL) DIF pairs with Zo=100 • 1 1.8V LVCMOS REF output with Wake-On-Lan (WOL) support Key Specifications • DIF cycle-to-cycle jitter < 50ps • DIF output-to-output skew < 50ps • DIF phase jitter is PCIe Gen1–4 compliant • REF phase jitter is < 1.