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9FGV1005C - Programmable PhiClock Generators

Download the 9FGV1005C datasheet PDF. This datasheet also covers the 9FGV1001C variant, as both devices belong to the same programmable phiclock generators family and are provided as variant models within a single manufacturer datasheet.

General Description

The 9FGV1001C / 9FGV1005C are members of the Renesas PhiClock™ programmable clock generator family.

The devices are optimized for low phase noise in non-spread spectrum applications such as Ethernet or PCI Express.

Key Features

  • 9FGV1001: 4 programmable output pairs plus 2 REF outputs.
  • 9FGV1005: 2 programmable output pairs plus 1 REF output.
  • 1 integer output frequency per configuration.
  • 1MHz.
  • 325MHz differential outputs.
  • 1MHz.
  • 200MHz single-ended outputs Features.
  • 1.8V to 3.3V power supplies.
  • Individual 1.8V to 3.3V VDDO for each output pair.
  • Supports HCSL, LVDS and LVCMOS I/O standards.
  • HCSL utilizes Renesas’ LP-HCSL technology for improved performance, lower.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (9FGV1001C-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 9FGV1005C
Manufacturer Renesas
File Size 1.34 MB
Description Programmable PhiClock Generators
Datasheet download datasheet 9FGV1005C Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Low Phase-Noise, Low-Power Programmable PhiClock™ Generators 9FGV1001C / 9FGV1005C Datasheet Description The 9FGV1001C / 9FGV1005C are members of the Renesas PhiClock™ programmable clock generator family. The devices are optimized for low phase noise in non-spread spectrum applications such as Ethernet or PCI Express. Four user-defined configurations may be selected via two hardware select pins or two I2C bits, allowing easy software selection of the desired configuration.