9QXL2000B Datasheet | Renesas

Description The 9QXL2000B is a 20-output very-low-additive phase jitter fanout buffer for PCIe Gen4 and Gen5. It offers integrated terminations for 85Ω transmission lines. PCIe Clocking Architectures - mon Clocked (CC) - Independent Reference (IR) with and without spread spectrum Typical Applications - Servers - Storage - Networking - SSDs Features - Low-Power HCSL (LP-HCSL) 85Ω outputs eliminate 80 resistors, saving 130mm2 of area - Low-Power HCSL (LP-HCSL) outputs reduce device power consumption by 50% - 8 OE# pins configurable to control up to 20 outputs - 9 selectable SMBus addresses - Spread spectrum patible - 10 × 10 mm 72-VFQFPN package Output Features - 20 Low-Power HCSL (LP-HCSL) 85Ω output pairs Key Specifications - Output-to-output skew: < 50ps - Additive phase jitter: DB2000Q filter < 40fs rms - Additive Phase jitter: PCIe Gen4 filter < 40fs rms - Additive Phase jitter: PCIe Gen5 filter < 20fs rms - DB2000Q v1.1 pinout Block Diagram VDDR VDD x 6 DIF_IN# DIF_IN DIF_19# DIF_19 ^v SADR0_tri ^v SADR1_tri SMBCLK SMBDAT ^CKPWRGD _PD# OE[5:12]# SMBus Engine Factory Configuration Control Logic 20 outputs DIF_0# DIF_0 GNDR EPAD/GND...