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9ZXL0652E - 6 to 12-Output Buffers

Download the 9ZXL0652E datasheet PDF (9ZXL1232E included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for 6 to 12-output buffers.

Description

3.

11 3.1 Absolute Maximum Ratings

Features

  • SMBus Write Protect pin prevents SMBus against accidental writes.
  • 6.
  • 12 Low-power HCSL (LP-HCSL) outputs.
  • Integrated terminations eliminate up to 4 resistors per output pair.
  • Dedicated OE# pins support PCIe CLKREQ# function.
  • Up to 9 selectable SMBus addresses (9ZXL12xx, 9ZXL0853).
  • Selectable PLL bandwidths minimizes jitter peaking in cascaded PLL topologies.
  • Hardware/SMBus control of ZDB and FOB modes allow change without power cycle.
  • Spread spectr.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (9ZXL1232E-Renesas.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Renesas

Full PDF Text Transcription

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9ZXL06x2E/9ZXL08xxE/9ZXL12x2E 6 to 12-Output Buffers for PCIe Gen1–5 and UPI with SMBus Write Protect Datasheet The 9ZXL revision E family of Zero-Delay/Fanout Buffers (ZDB, FOB) with SMBus Write Protect are 2nd-generation enhanced performance buffers for PCIe and CPU applications. The devices have hardware SMBUS write protection to prevent accidental writes. The family meets all published QPI/UPI, DB2000Q and PCIe Gen1–5 jitter specifications. Devices range from 6 to 12 outputs, with each output having an OE# pin to support the PCIe CLKREQ# function for low power states. All devices meet DB2000Q, DB1200ZL and DB800ZL jitter and skew requirements.
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