Renesas Electronics CD4020BMS
The CD4020BMS, CD4024BMS and the CD4040BMS is supplied in these 14 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack CD4020B H4W H1F H6W CD4024B H4Q H1B H3W CD4040B H4X H1F H6W Pinouts CD4020BMS TOP VIEW Q12 1 Q13 2 Q14 3 Q6 4 Q5 5 Q7 6 Q4 7 VSS 8 16 VDD 15 Q11 14 Q10 13 Q8 12 Q9 11 RESET 10 9 Q1 CD4024BMS TOP VIEW 1 RESET 2 Q7 3 Q6 4 Q5 5 Q4 6 VSS 7 14 VDD 13 NC 12 Q1 11 Q2 10 NC 9 Q3 8 NC NC = NO CONNECTION CD4040BMS TOP VIEW Q12 1 Q6 2 Q5 3 Q7 4 Q4 5 Q3 6 Q2 7 VSS 8 16 VDD 15 Q11 14 Q10 13 Q8 12 Q9 11 R 10 9 Q1 FN3300 Rev 1.00 October 1996 Page 1 of 10 CD4020BMS...FEATURES
● High Voltage Types (20V Rating)● Medium Speed Operation
● Fully Static Operation
● Buffered Inputs and Outputs
● 100% Tested for Quiescent Current at 20V
● Standardized Symmetrical Output Characteristics
● Common Reset
● 5V, 10V and 15V Parametric Ratings
● Maximum Input Current of 1a at 18V Over Full Pack- age-Temperature Range; - 100nA at 18V and 25oC
● Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V
● Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications For
DESCRIPTION
Of ‘B’ Series CMOS Devices”APPLICATIONS
● Control Counters● Timers
● Frequency Dividers
● Time-Delay Circuits
DESCRIPTION
CD4020BMS - 14 Stage CD4024BMS - 7 Stage CD4040BMS - 12 Stage CD4020BMS, CD4024BMS, and CD4040BMS are ripplecarry binary counters. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state.