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EL4584 - Horizontal Genlock

Key Features

  • 36MHz, general purpose PLL.
  • 4FSC based timing (use the EL4585 for 8FSC).
  • Compatible with EL4583 sync separator.
  • VCXO, Xtal, or LC tank oscillator.
  • < 2ns jitter (VCXO).
  • User controlled PLL capture and lock.
  • Compatible with NTSC and PAL TV formats.
  • 8 pre-programmed TV scan rate clock divisors.
  • Selectable external divide for custom ratios.
  • Single 5V, low current operation.
  • Pb-Free available (RoHS com.

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Datasheet Details

Part number EL4584
Manufacturer Renesas
File Size 810.98 KB
Description Horizontal Genlock
Datasheet download datasheet EL4584 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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EL4584 Horizontal Genlock, 4FSC The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to it. The reference signal is a horizontal sync signal, TTL/CMOS format, which can be easily derived from an analog composite video signal with the EL4583 Sync Separator. An input signal to “coast” is provided for applications where periodic disturbances are present in the reference video timing, such as VTR head switching. The Lock detector output indicates correct lock.