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EL4584
Horizontal Genlock, 4FSC
The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to it.
The reference signal is a horizontal sync signal, TTL/CMOS format, which can be easily derived from an analog composite video signal with the EL4583 Sync Separator. An input signal to “coast” is provided for applications where periodic disturbances are present in the reference video timing, such as VTR head switching. The Lock detector output indicates correct lock.
EL4584 Datasheet
