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HD74AC112 Datasheet Dual Jk Negative Edge-triggered Flip-flop

Manufacturer: Renesas

Overview: HD74AC112/HD74ACT112 Dual JK Negative Edge-Triggered Flip-Flop REJ03D0244–0200Z (Previous ADE-205-364 (Z)) Rev.2.00 Jul.16.

Datasheet Details

Part number HD74AC112
Manufacturer Renesas
File Size 209.33 KB
Description Dual JK Negative Edge-Triggered Flip-Flop
Datasheet HD74AC112-Renesas.pdf

General Description

The HD74AC112/HD74ACT112

Key Features

  • individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will perform according to the Truth Table as long as minimum setup and hold times are observed. Input data is transferred to the outputs on the falling edge of the clock pulse. Features.
  • Outputs Source/Sink 24 mA.
  • HD74ACT112 has TTL-Comp.

HD74AC112 from other manufacturers

Brand Logo Part Number Description Other Manufacturers
Hitachi Semiconductor Logo HD74AC112 Dual JK Negative Edge-Triggered Flip-Flop Hitachi Semiconductor

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HD74AC112 Distributor