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HD74AC165 - Parallel-Load 8-bit Shift Register

General Description

This 8-bit serial shift register shifts data from QA to QH when clocked, Parallel inputs to each stage are enabled by a low level at the Shift/Load Input.

Also included is a gated clock input and a complementary output from the eighth bit.

Key Features

  • Outputs Source/Sink 24 mA.
  • Ordering Information Part Name Package Type Package Code Package A.

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Datasheet Details

Part number HD74AC165
Manufacturer Renesas
File Size 203.33 KB
Description Parallel-Load 8-bit Shift Register
Datasheet download datasheet HD74AC165 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HD74AC165 Parallel-Load 8-bit Shift Register REJ03D0254–0200Z (Previous ADE-205-374 (Z)) Rev.2.00 Jul.16.2004 Description This 8-bit serial shift register shifts data from QA to QH when clocked, Parallel inputs to each stage are enabled by a low level at the Shift/Load Input. Also included is a gated clock input and a complementary output from the eighth bit. Clocking is accomplished through a 2-input NOR gate permitting one input to be used as a clock inhibit function. Holding either of the clock inputs high inhibits clocking, and holding either clock input low with the Shift/Load input high enables the other clock input. Data transfer occurs on the positive going edge of the clock. Parallel loading is inhibited as long as the Shift/Load input is high.