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HD74ACT107 - Dual JK Flip-Flop

Download the HD74ACT107 datasheet PDF. This datasheet also covers the HD74AC107 variant, as both devices belong to the same dual jk flip-flop family and are provided as variant models within a single manufacturer datasheet.

General Description

The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop.

Inputs to the master section are controlled by the clock pulse.

The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections.

Key Features

  • Outputs Source/Sink 24 mA.
  • HD74ACT107 has TTL-Compatible Inputs.
  • Ordering Information: Ex. HD74AC107 Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74AC107FPEL SOP-14 pin (JEITA) FP-14DAV FP EL (2,000 pcs/reel) HD74AC107RPEL SOP-14 pin (JEDEC) FP-14DNV RP EL (2,500 pcs/reel) Notes: 1. Please consult th.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HD74AC107-Renesas.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
HD74ACT107 Dual JK Flip-Flop (with Separate Clear and Clock) Hitachi Semiconductor
HD74ACT112 Dual JK Negative Edge-Triggered Flip-Flop Hitachi Semiconductor
HD74ACT125 Quad Buffer/Line Driver with 3-State Output Hitachi Semiconductor
HD74ACT126 Quad Buffer/Line Driver with 3-State Output Hitachi Semiconductor
HD74ACT138 1-of-8 Decoder/Demultiplexer Hitachi Semiconductor

Other Datasheets by Renesas

Part Number Description
HD74ACT112 Dual JK Negative Edge-Triggered Flip-Flop
HD74ACT125 Quad Buffer/Line Driver
HD74ACT126 Quad Buffer/Line Driver
HD74ACT138 1-of-8 Decoder/Demultiplexer
HD74ACT139 Dual 1-of-4 Decoder/Demultiplexer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74AC107/HD74ACT107 Dual JK Flip-Flop (with Separate Clear and Clock) REJ03D0243–0200Z (Previous ADE-205-363 (Z)) Rev.2.00 Jul.16.2004 Description The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop. Inputs to the master section are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The sequence of operation is as follows: 1) isolate slave from master; 2) enter information from J and K inputs to master; 3) disable J and K inputs; 4) transfer information from master to slave. Features • Outputs Source/Sink 24 mA • HD74ACT107 has TTL-Compatible Inputs • Ordering Information: Ex.