HD74ACT112 Datasheet Dual Jk Negative Edge-triggered Flip-flop

Manufacturer: Renesas

Overview: HD74AC112/HD74ACT112 Dual JK Negative Edge-Triggered Flip-Flop REJ03D0244–0200Z (Previous ADE-205-364 (Z)) Rev.2.00 Jul.16.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Datasheet Details

Part number	HD74ACT112
Manufacturer	Renesas
File Size	209.33 KB
Description	Dual JK Negative Edge-Triggered Flip-Flop
Datasheet	HD74ACT112 HD74AC112 Datasheet (PDF)

The HD74AC112/HD74ACT112

individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will perform according to the Truth Table as long as minimum setup and hold times are observed. Input data is transferred to the outputs on the falling edge of the clock pulse. Features.
Outputs Source/Sink 24 mA.
HD74ACT112 has TTL-Comp.

Brand Logo	Part Number	Description	Other Manufacturers
	HD74ACT112	Dual JK Negative Edge-Triggered Flip-Flop	Hitachi Semiconductor

Part Number	Description
HD74ACT107	Dual JK Flip-Flop
HD74ACT125	Quad Buffer/Line Driver
HD74ACT126	Quad Buffer/Line Driver
HD74ACT138	1-of-8 Decoder/Demultiplexer
HD74ACT139	Dual 1-of-4 Decoder/Demultiplexer
HD74ACT164	Shift Register
HD74ACT166	8-bit Shift Register
HD74ACT240	Octal Buffer/Line Driver
HD74ACT244	Octal Buffer/Line Driver
HD74ACT245	Octal Bi-directional Transceiver