DESCRIPTION
Serial and parallel entry are synchronous, with state changes initiated by the rising edge of the clock. An asynchronous Master Reset overrides other inputs and clears all flip-flops. HD74AC166 Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74AC166AFPEL SOP-16 pin (JEITA) FP-16DAV FP EL (2,000 pcs/reel) HD74AC166ARPEL SOP-16 pin (JEDEC) FP-16DNV RP EL (2,500 pcs/reel) HD74AC166TELL TSSOP-16 pin TTP-16DAV T ELL(2,000 pcs/reel) Notes: 1. Please consult the sales office for the above pac