HD74ALVC2G126 Description
The HD74ALVC2G126 has dual bus buffer with 3-state output in an 8 pin package. Output is disabled when the associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE should be connected to GND through a pull-down resistor;.
HD74ALVC2G126 Key Features
- The basic gate function is lined up as Renesas uni logic series
- Supplied on emboss taping for high-speed automatic mounting
- Supply voltage range : 1.2 to 3.6 V
- All inputs VIH (Max.) = 3.6 V (@VCC = 0 V to 3.6 V)
- Output current
- Ordering Information
- HD74ALVC2G126