HD74ALVCH162831 Datasheet | Renesas

Description This 1-bit to 4-bit address register / driver is designed for 2.3 V to 3.6 V VCC operation. The device is ideal for use in applications in which a single address bus is driving four separate memory locations. The HD74ALVCH162831 can be used as a buffer or a register, depending on the logic level of the select (SEL) input. When SEL is logic high, the device is in the buffer mode. The outputs follow the inputs and are controlled by the two output enable (OE) controls. Each OE controls two groups of nine outputs. When SEL is logic low, the device is in the register mode. The register is an edge triggered D-type flip flop. On the positive transition of the clock (CLK) input, data set up at the A inputs is stored in the internal registers. OE controls operate the same as in buffer mode. When OE is logic low, the outputs are in a normal...