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HD74HC237 - 3-to-8-line Decoder/Demultiplexer

General Description

The HD74HC237 decodes a three-bit Address to one-of-eight active-high outputs.

The device has a transparent latch for storage of the Address.

Two Chip Selects, one active-low and one active-high, are provided to facilitate the demultiplexing, cascading, and chip-selecting functions.

Key Features

  • High Speed Operation: tpd (Data to Y) = 19 ns typ (CL = 50 pF).
  • High Output Current: Fanout of 10 LSTTL Loads.
  • Wide Operating Voltage: VCC = 2 to 6 V.
  • Low Input Current: 1 µA max.
  • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C).
  • Ordering Information Part Name.

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Datasheet Details

Part number HD74HC237
Manufacturer Renesas
File Size 242.42 KB
Description 3-to-8-line Decoder/Demultiplexer
Datasheet download datasheet HD74HC237 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74HC237 3-to-8-line Decoder/Demultiplexer with Address Latch REJ03D0592–0200 (Previous ADE-205-469) Rev.2.00 Jan 31, 2006 Description The HD74HC237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a transparent latch for storage of the Address. Two Chip Selects, one active-low and one active-high, are provided to facilitate the demultiplexing, cascading, and chip-selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output, and then by using one of the Chip Selects as a data input while holding the other one active. The HD74HD237 is the noninverting version of the HD74HC137.