HD74HC294
Description
This device divides the incoming clock frequency by a number (a power of 2) that is preset by the Programming inputs. It has two Clock inputs, either of which may be used as a clock inhibit.
Key Features
- High Speed Operation: tpd (Clock to Q) = 16 ns typ (CL = 50 pF)
- High Output Current: Fanout of 10 LSTTL Loads
- Wide Operating Voltage: VCC = 2 to 6 V
- Low Input Current: 1 µA max
- Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
