Datasheet4U Logo Datasheet4U.com

HD74HC83 - 4-bit Binary Full Adder

General Description

This improved full adder performs the addition of two 4-bit binary numbers.

The sum (Σ) output are provided for each bit and the resultant carry (C4) is obtained from the fourth bit.

Key Features

  • full internal look ahead across all four bit generating the carry term in ten nanoseconds typically. This provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation. Features.
  • High Speed Operation: tpd (Ai or Bi to Zi) = 16 ns typ (CL = 50 pF).
  • High Output Current: Fanout of 10 LSTTL Loads.
  • Wide Operating Voltage: VCC = 2 to 6 V.
  • Low Input Current: 1 µA max.
  • Low Quiesce.

📥 Download Datasheet

Datasheet Details

Part number HD74HC83
Manufacturer Renesas
File Size 93.62 KB
Description 4-bit Binary Full Adder
Datasheet download datasheet HD74HC83 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
HD74HC83 4-Bit Binary Full Adder Hitachi Semiconductor
HD74HC85 4-Bit Magnitude Comparator Hitachi Semiconductor
HD74HC86 Quad. 2-input Exclusive-OR Gates Hitachi Semiconductor
HD74HC00 Quad. 2-input NAND Gates Hitachi Semiconductor
HD74HC01 Quad. 2-input NAND Gates Hitachi Semiconductor

Other Datasheets by Renesas

Part Number Description
HD74HC85 4-bit Magnitude Comparator
HD74HC86 Quad. 2-input Exclusive-OR Gates
HD74HC00 Quad. 2-input NAND Gates
HD74HC01 Quad. 2-input NAND Gates
HD74HC02 Quad. 2-input NOR Gates

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74HC83 4-bit Binary Full Adder (with Fast Carry) REJ03D0554-0200 (Previous ADE-205-426) Rev.2.00 Oct 06, 2005 Description This improved full adder performs the addition of two 4-bit binary numbers. The sum (Σ) output are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. This adder features full internal look ahead across all four bit generating the carry term in ten nanoseconds typically. This provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation.