HD74LS191P
HD74LS191P is Synchronous Up / Down 4-bit Binary Counter manufactured by Renesas.
- Part of the HD74LS191 comparator family.
- Part of the HD74LS191 comparator family.
feature allows the counters to be used as modulo-N dividers by simply modifying the count length with the preset inputs. The clock, down / up, and load inputs are buffered to lower the drive requirement which significantly reduces the number of clock drivers, etc., required for long parallel words.
Two outputs have been made available to perform the cascading function; ripple clock and made available to perform the cascading function; ripple clock and maximum / minimum count. The latter output produces a high-level output pulse with a duration approximately equal to one plete cycles to the clock when the counter overflows or underflows. The ripple clock output produces a low-level output pulse equal in width to the low-level portion of the clock input when an overflow or underflow condition exists.
The counters can be easily cascaded by feeding the ripple clock output to the enable input of the succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The maximum / minimum count output can be used to acplish look-ahead for high-speed operation.
Features
- Ordering Information
Part Name
Package Type
Package Code (Previous Code)
Package Abbreviation
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
HD74LS191FPEL SOP-16 pin (JEITA)
PRSP0016DH-B
(FP-16DAV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation (Quantity)
- EL (2,000 pcs/reel)
Rev.2.00, Feb.18.2005, page 1 of 10
HD74LS191
Pin Arrangement
Data B Input
Outputs
QB 2 QA 3
Enable G 4 Inputs
Down/Up 5
Outputs
QC 6 QD 7
GND 8
Ripple
Clock...
