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HD74LS83AP - 4-bit Binary Full Adder

Download the HD74LS83AP datasheet PDF. This datasheet also covers the HD74LS83A variant, as both devices belong to the same 4-bit binary full adder family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • full internal look ahead across all four bit generating the carry term in ten nanoseconds typically. This provides the system designer with partial lookahead performance at the economy and reduced package count of a ripple-carry implementation. Features.
  • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS83AP DILP-16 pin PRDP0016AE-B (DP-16FV) P Note: Please consult the sales office for the above package availability. Taping Ab.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HD74LS83A-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HD74LS83AP
Manufacturer Renesas
File Size 196.48 KB
Description 4-bit Binary Full Adder
Datasheet download datasheet HD74LS83AP Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
HD74LS83A 4-Bit Binary Full Adders Hitachi Semiconductor
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HD74LS86 Quadruple 2-input Exclusive-OR Gates Hitachi Semiconductor
HD74LS00 Quadruple 2-Input NAND Gates Hitachi Semiconductor
HD74LS01 Quadruple 2-input Positive NAND Gates Hitachi Semiconductor

Other Datasheets by Renesas

Part Number Description
HD74LS83A 4-bit Binary Full Adder
HD74LS85 4-bit Magnitude Comparator
HD74LS85P 4-bit Magnitude Comparator
HD74LS86 Quadruple 2-input Exclusive-OR Gates
HD74LS86P Quadruple 2-input Exclusive-OR Gates

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74LS83A 4-bit Binary Full Adder (with Fast Carry) REJ03D0420–0200 Rev.2.00 Feb.18.2005 This improved full adder performs the addition of two 4-bit binary numbers. The sum (Σ) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. This adder features full internal look ahead across all four bit generating the carry term in ten nanoseconds typically. This provides the system designer with partial lookahead performance at the economy and reduced package count of a ripple-carry implementation. Features • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS83AP DILP-16 pin PRDP0016AE-B (DP-16FV) P Note: Please consult the sales office for the above package availability.