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ICS548A-03 Datasheet Low Skew Clock Inverter And Divider

Manufacturer: Renesas

Overview: LOW SKEW CLOCK INVERTER AND DIVIDER DATASHEET ICS548A-03.

Datasheet Details

Part number ICS548A-03
Manufacturer Renesas
File Size 292.89 KB
Description LOW SKEW CLOCK INVERTER AND DIVIDER
Datasheet ICS548A-03-Renesas.pdf

General Description

The ICS548A-03 is a low cost, low skew, high-performance general purpose clock designed to produce a set of one output clock, one inverted output clock, and one clock divided-by-two.

Using our patented Phase-Locked Loop (PLL) techniques, the device operates from a frequency range of 10 MHz to 120 MHz in the PLL mode, and up to 160 MHz in the non-PLL mode.

In applications that need to maintain low phase noise in the clock tree, the non-PLL (when S3=S2=1) modes should be used.

Key Features

  • Packaged in 16-pin SOIC (150 mil).
  • Input clock up to 160 MHz in the non-PLL mode.
  • Provides clock outputs of CLK, CLK, and CLK/2.
  • Low skew (500 ps) on CLK, CLK, and CLK/2.
  • All outputs can be tri-stated.
  • Entire chip can be powered down by changing one or two select pins.
  • 3.3 V operating range.
  • Available in commercial and industrial temperature ranges.
  • RoHS 5 (green) or RoHS 6 (green and lead free) compliant package.

Similar Datasheet

Brand Logo Part Number Description Manufacturer
Integrated Device Technology Logo ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER Integrated Device Technology

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