ICS552-01 Overview
The ICS552-01 produces 8 low-skew copies of the multiple input clock or fundamental, parallel-mode crystal. Unlike other clock drivers, these parts do not require a separate oscillator for the input. Using IDT’s patented Phase-Locked Loop (PLL) to multiply the input frequency, it is ideal for generating and distributing multiple high-frequency clocks.
ICS552-01 Key Features
- Packaged as 20-pin SSOP (QSOP)
- Pb-free packaging
- Operating voltages of 3.0 V to 5.5 V
- Industrial temperature available
- Contains on-chip multiplier with selections of x1
- Power-down and Tri-state modes
- Up to 200 MHz clock input/output at 3.3 V
- Low skew of 250 ps maximum for any bank of four
- Inputs can be connected together for a 1 to 8 buffer
- Non-inverting buffer mode
