ICS621 Datasheet PDF - Renesas LOW SKEW 1 TO 4 CLOCK BUFFER Specs

ICS621 - LOW SKEW 1 TO 4 CLOCK BUFFER

Datasheet Summary

Description

The ICS621 is a low skew, single input to four output, clock buffer.

The device operates from a single 1.2 to 1.8 volt supply and has a 3.3 volt tolerant input, making it ideal for level translation.

Features

Low skew outputs (150 ps).
Packaged in 8-pin SOIC or 8-pin DFN (2x2mm).
RoHS 5 or RoHS 6 (lead-free) package.
Low power CMOS technology.
Operating voltages of 1.2 V to 1.8 V.
Output Enable pin tri-states outputs.
3.3 V tolerant input clock.
Industrial or commercial temperature ranges Block Diagram ICLK Q0 Q1 Q2 Q3 Output Enable IDT® LOW SKEW 1 TO 4 CLOCK BUFFER 1 ICS621 REV G 051310 ICS621 LOW SKEW 1 TO 4 CLOCK BUFF.

Datasheet Details

Part number	ICS621
Manufacturer	Renesas
File Size	230.37 KB
Description	LOW SKEW 1 TO 4 CLOCK BUFFER
Datasheet	ICS621 Datasheet
Additional preview pages of the ICS621 datasheet.

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Full PDF Text Transcription

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LOW SKEW 1 TO 4 CLOCK BUFFER DATASHEET ICS621 Description The ICS621 is a low skew, single input to four output, clock buffer. The device operates from a single 1.2 to 1.8 volt supply and has a 3.3 volt tolerant input, making it ideal for level translation. IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features • Low skew outputs (150 ps) • Packaged in 8-pin SOIC or 8-pin DFN (2x2mm) • RoHS 5 or RoHS 6 (lead-free) package • Low power CMOS technology • Operating voltages of 1.2 V to 1.8 V • Output Enable pin tri-states outputs • 3.

Published: Jun 4, 2020 |