ICS650-14 Datasheet PDF (NETWORKING SYSTEM CLOCK)

General Description

The ICS650-14 is a low-cost, low-jitter, high-performance clock synthesizer customized for networking systems applications.

Key Features

Packaged in 20-pin (150 mil) SSOP (QSOP).
25 MHz fundamental crystal clock or clock input.
One fixed output clock of 25 MHz.
One bank of four frequency selectable output clocks.
Three frequency selectable clocks outputs.
Zero ppm synthesis error in all clocks.
Ideal for networking systems.
Full CMOS output swing.
Advanced, low-power sub-micron CMOS process.
Operating voltage of 3.3 V or 5 V.
Indus.

Datasheet Details

Part number	ICS650-14
Manufacturer	Renesas
File Size	334.16 KB
Description	NETWORKING SYSTEM CLOCK
Datasheet	ICS650-14 Datasheet

Part number

ICS650-14

Manufacturer

Renesas

File Size

334.16 KB

Description

NETWORKING SYSTEM CLOCK

Datasheet

ICS650-14 Datasheet

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Part Number

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Other Datasheets by Renesas

Part Number	Description
ICS650-01	SYSTEM PERIPHERAL CLOCK SOURCE
ICS650-07C	NETWORKING CLOCK SOURCE
ICS650-21	SYSTEM PERIPHERAL CLOCK SOURCE
ICS650-22	PRV AND STB CLOCK SOURCE
ICS650-27	NETWORKING CLOCK SOURCE

Part Number

Description

ICS650-01

SYSTEM PERIPHERAL CLOCK SOURCE

ICS650-07C

NETWORKING CLOCK SOURCE

ICS650-21

SYSTEM PERIPHERAL CLOCK SOURCE

ICS650-22

PRV AND STB CLOCK SOURCE

ICS650-27

NETWORKING CLOCK SOURCE

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text

NETWORKING SYSTEM CLOCK DATASHEET ICS650-14 Description The ICS650-14 is a low-cost, low-jitter, high-performance clock synthesizer customized for networking systems applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a 25 MHz clock or fundamental mode crystal input to produce multiple output clocks of one fixed 25 MHz, a four (plus one) frequency selectable bank, and two frequency selectable clocks. All output clocks are frequency locked together. All of the ICS650-14 outputs have zero ppm synthesis error.