Datasheet4U Logo Datasheet4U.com

ICS83056I-01 - SINGLE-ENDED LVCMOS MULTIPLEXER

Key Features

  • The ICS83056I-01 is a 6-bit, 2:1, Single-ended ICS LVCMOS Multiplexer and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS83056I-01 has two selectable single-ended LVCMOS clock inputs and six single-ended LVCMOS clock outputs. The outputs have a VDDO which may be set at 3.3V, 2.5V, or 1.8V, making the device ideal for use in voltage translation.

📥 Download Datasheet

Datasheet Details

Part number ICS83056I-01
Manufacturer Renesas
File Size 798.50 KB
Description SINGLE-ENDED LVCMOS MULTIPLEXER
Datasheet download datasheet ICS83056I-01 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
ICS83056I-01 SINGLE-ENDED MULTIPLEXER Integrated Circuit Systems
ICS83056I SINGLE-ENDED MULTIPLEXER Integrated Circuit Systems
ICS8305 LOW SKEW / 1-TO-4 / MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER Integrated Circuit Systems
ICS83052I SINGLE-ENDED MULTIPLEXER Integrated Circuit Systems
ICS83052I-01 SINGLE-ENDED MULTIPLEXER Integrated Circuit Systems

Other Datasheets by Renesas

Part Number Description
ICS8305 LVCMOS-to-LVCMOS/LVTTL Fanout Buffer
ICS8305I LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER
ICS8305I-02 LVCMOS-to-LVCMOS Fanout Buffer
ICS831721I Differential Clock/Data Multiplexer
ICS83210 HSTL Fanout Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
6-BIT, 2:1, SINGLE-ENDED LVCMOS MULTIPLEXER ICS83056I-01 General Description Features The ICS83056I-01 is a 6-bit, 2:1, Single-ended ICS LVCMOS Multiplexer and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS83056I-01 has two selectable single-ended LVCMOS clock inputs and six single-ended LVCMOS clock outputs. The outputs have a VDDO which may be set at 3.3V, 2.5V, or 1.8V, making the device ideal for use in voltage translation applications. An output enable pin places the output in a high impedance state which may be useful for testing or debug. Possible applications include systems with up to 6 transceivers which need to be independently set for different rates.