Datasheet4U Logo Datasheet4U.com

ICS831721I - Differential Clock/Data Multiplexer

General Description

The ICS831721I is a high-performance, differential HCSL clock/data multiplexer and fanout buffer.

The device is designed for the multiplexing of high-frequency clock and data signals.

The device has two differential, selectable clock/data inputs.

Key Features

  • 2:1 differential clock/data multiplexer with fanout.
  • Two selectable, differential inputs.
  • Each differential input pair can accept the following levels: HCSL, LVHSTL, LVDS and LVPECL.
  • One differential HCSL output.
  • Maximum input/output clock frequency: 700MHz (maximum).
  • Maximum input/output data rate: 1400Mb/s (NRZ)LVCMOS interface levels for all control inputs.
  • Input skew: 55ps (maximum).
  • Part-to-part skew: 400ps (maximum).

📥 Download Datasheet

Datasheet Details

Part number ICS831721I
Manufacturer Renesas
File Size 0.97 MB
Description Differential Clock/Data Multiplexer
Datasheet download datasheet ICS831721I Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Differential Clock/Data Multiplexer ICS831721I DATASHEET General Description The ICS831721I is a high-performance, differential HCSL clock/data multiplexer and fanout buffer. The device is designed for the multiplexing of high-frequency clock and data signals. The device has two differential, selectable clock/data inputs. The selected input signal is output at one differential HCSL output. Each input pair accepts HCSL, LVDS, and LVPECL levels. The ICS831721I is characterized to operate from a 3.3V power supply. Guaranteed input, output-to-output and part-to-part skew characteristics make the ICS831721I ideal for those clock and data distribution applications demanding well-defined performance and repeatability.