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ICS8741004I - Differential-to-LVDS/0.7V Differential Jitter Attenuator

General Description

The 8741004I is a high performance Differential-to-LVDS/0.7V Differential Jitter Attenuator designed for use in PCI Express™ systems.

Key Features

  • Two LVDS and two 0.7V differential output pairs Bank A has two LVDS output pairs and Bank B has two 0.7V differential output pairs.
  • One differential clock input pair.
  • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL.
  • Output frequency range: 98MHz - 160MHz.
  • Input frequency range: 98MHz - 128MHz.
  • VCO range: 490MHz - 640MHz.
  • Cycle-to-cycle jitter: 35ps (maximum).
  • Full 3.3V ope.

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Datasheet Details

Part number ICS8741004I
Manufacturer Renesas
File Size 600.09 KB
Description Differential-to-LVDS/0.7V Differential Jitter Attenuator
Datasheet download datasheet ICS8741004I Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Differential-to-LVDS/0.7V Differential PCI Express™ Jitter Attenuator 8741004I Data Sheet General Description The 8741004I is a high performance Differential-to-LVDS/0.7V Differential Jitter Attenuator designed for use in PCI Express™ systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 8741004I has 3 PLL bandwidth modes: 200kHz, 600kHz and 2MHz.