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ICS950405 - System Clock

General Description

PIN # PIN NAME 1 FS0/REF0 2 VDDHTT 3 X1 4 X2 5 GND 6 ModeA/HTTCLK0 7 ModeB/PCICLK8/HTTCLK1 8 PCICLK9/HTTCLK2 9 VDDPCI 10 GND 11 PCICLK11/HTTCLK3 12 PCICLK10 13 PCICLK0 14 PCICLK1 15 GND 16 VDDPCI 17 PCICLK2 18 PCICLK3 19 VDDPCI 20 GND 21 2XPCICLK4 22 2XPCICLK5 23 2XPCICLK6 24 2XPCIC

Key Features

  • 2 - Differential pair push-pull CPU clocks @ 3.3V.
  • 9 - PCICLK (Including 1 free running) @ 3.3V.
  • 3 - Selectable PCICLK/HTTCLK @ 3.3V.
  • 1 - HTTCLK @ 3.3V.
  • 1 - 48MHz @ 3.3V fixed.
  • 1 - 24/48MHz @ 3.3V.
  • 3 - REF @ 3.3V, 14.318MHz. Features:.
  • Programmable output frequency.
  • Programmable output divider ratios.
  • Programmable output rise/fall time.
  • Programmable output skew.
  • Programmable spread.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ICS950405 AMD - K8™ System Clock Chip Recommended Application: AMD K8 System Clock with AMD, VIA or ALI Chipset Output Features: • 2 - Differential pair push-pull CPU clocks @ 3.3V • 9 - PCICLK (Including 1 free running) @ 3.3V • 3 - Selectable PCICLK/HTTCLK @ 3.3V • 1 - HTTCLK @ 3.3V • 1 - 48MHz @ 3.3V fixed. • 1 - 24/48MHz @ 3.3V • 3 - REF @ 3.3V, 14.318MHz. Features: • Programmable output frequency. • Programmable output divider ratios. • Programmable output rise/fall time. • Programmable output skew. • Programmable spread percentage for EMI control. • Watchdog timer technology and RESET# output to reset system if system malfunctions. • Programmable watch dog safe frequency. • Support I2C Index read/write and block read/write operations. • Uses external 14.318MHz crystal.