ICS9DBL411A
Features
:
- 4
- low power differential output pairs
- Individual OE# control of each output pair
Key Specifications:
- Output cycle-cycle jitter < 25ps additive
- Output to output skew: < 50ps
Features
/Benefits:
- Low power differential fanout buffer for PCIExpress and CPU clocks
- 20-pin MLF or TSSOP packaging
General Description
:
The ICS9DBL411 is a 4 output lower power differential buffer. Each output has its own OE# pin. It has a maximum input frequency of 400 MHz.
Power Groups
Pin Number (TSSOP)
9,18 10,17
Pin Number (MLF)
6,15 7,14
Description
VDD_IO for DIF(3:0) 3.3V Analog VDD & GND
Description
VDD_IO for DIF(3:0) 3.3V Analog VDD & GND
Funtional Block Diagram
OE#(3:0)
DIF_INT DIF_INC
STOP LOGIC
DIF_LPR(3:0)
IDT® Four Output Differential Buffer for PCI Express
1250C-...
