Download ICS9DBL411A Datasheet PDF
ICS9DBL411A page 2
Page 2
ICS9DBL411A page 3
Page 3

ICS9DBL411A Description

The ICS9DBL411 is a 4 output lower power differential buffer. Each output has its own OE# pin. It has a maximum input frequency of 400 MHz.

ICS9DBL411A Key Features

  • low power differential output pairs
  • Individual OE# control of each output pair
  • Output cycle-cycle jitter < 25ps additive
  • Output to output skew: < 50ps
  • Low power differential fanout buffer for PCIExpress and CPU clocks
  • 20-pin MLF or TSSOP packaging