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ICS9FG1201H - Frequency Gearing Clock

Product Overview

Renesas

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ICS9FG1201H Frequency Gearing Clock by Renesas - Datasheet Preview — Datasheet preview – ICS9FG1201H

Datasheet Details

Part number	ICS9FG1201H
Manufacturer	Renesas
File Size	356.89 KB
Description	Frequency Gearing Clock
Datasheet	ICS9FG1201H Datasheet
Additional preview pages of the ICS9FG1201H datasheet.

Product details

Description

The ICS9FG1201H follows the Intel DB1200G Rev 1.0 Differential Buffer Specification.

Features

Benefits.
Drives 2 channels of 4 FBDIMMs (total of 8 FBDIMMs).
Power up default is all outputs in 1:1 mode.
DIF_(9:0) can be “gear-shifted” from the input CPU Host Clock.
DIF_(11:10) can be “gear-shifted” from the input CPU Host Clock.
Spread spectrum compatible.
Supports output clock frequencies up to 400 MHz.
8 Selectable SMBus addresses.
SMBus address determines PLL or Bypass mode Functional Block Diagram OE# OE(9:0)#.

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Published: May 8, 2020 |