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ICS9LPRS525 - 56-pin CK505

General Description

PIN # PIN NAME 1 PCI0/CR#_A 2 VDDPCI 3 PCI1/CR#_B 4 PCI2/TME 5 PCI3/CFG0 6 PCI4/SRC5_EN 7 PCI_F5/ITP_EN 8 GNDPCI 9 VDD48 10 USB_48MHz/FSLA 11 GND48 12 VDD96IO 13 DOTT_96_LRS/SRCT0_LRS 14 DOTC_96_LRS/SRCC0_LRS 15 GND 16 VDD 17 SRCT1_LRS/SE1 18 SRCC1_LRS/SE2 19 GND 20 VDDPLL3IO 21 SRCT2_LRS/SATA

Key Features

  • 2 - CPU differential low power push-pull pairs.
  • 7 - SRC differential push-pull pairs.
  • 1 - CPU/SRC selectable differential low power push-pull pair.
  • 1 - SRC/DOT selectable differential low power push-pull pair.
  • 1 - SRC/SE selectable differential push-pull pair/Single-ended outputs.
  • 5 - PCI, 33MHz.
  • 1 - USB, 48MHz.
  • 1 - REF, 14.318MHz Key Specifications:.
  • CPU outputs cycle-cycle jitter.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DATASHEET 56-pin CK505 for Intel Systems ICS9LPRS525 Recommended Application: 56-pin CK505 compatible clock, w/fully integrated Vreg and series resistors on differential outputs Output Features: • 2 - CPU differential low power push-pull pairs • 7 - SRC differential push-pull pairs • 1 - CPU/SRC selectable differential low power push-pull pair • 1 - SRC/DOT selectable differential low power push-pull pair • 1 - SRC/SE selectable differential push-pull pair/Single-ended outputs • 5 - PCI, 33MHz • 1 - USB, 48MHz • 1 - REF, 14.