ICSSSTVA16859C Overview
The 13-bit-to-26-bit ICSSSTVA16859C is a universal bus driver designed for 2.3V to 2.7V VDD operation and SSTL_2 I/O levels, except for the LVCMOS RESET# input. Data flow from D to Q is controlled by the differential clock (CLK/CLK#) and a control signal (RESET#). The positive edge of CLK is used to trigger the data flow and CLK# is used to maintain sufficient noise margins where as RESET#, an LVCMOS asynchronous...
ICSSSTVA16859C Key Features
- Differential clock signals
- Meets SSTL_2 signal data
- Supports SSTL_2 class I specifications on outputs
- Low-voltage operation
- VDD = 2.3V to 2.7V
- Available in 64 pin TSSOP and 56 pin MLF packages
- Exceeds ICSSSTVN16859 performance
