IDT7200 Datasheet | Renesas

CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9 and 1,024 x 9 IDT7200L IDT7201LA IDT7202LA LEAD FINISH (Sn Pb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018 Features : - First-In/First-Out dual-port memory - 256 x 9 organization (IDT7200) - 512 x 9 organization (IDT7201) - 1,024 x 9 organization (IDT7202) - Low power consumption - Active: 440m W (max.) - Power-down: 28m W (max.) - Ultra high speed- 12ns access time - Asynchronous and simultaneous read and write - Fully expandable by both word depth and/or bit width - 720x family is pin and functionally patible from 256 x 9 to 64k x 9 - Status Flags: Empty, Half-Full, Full - Auto-retransmit capability - High-performance CEMOS™ technology - Military product pliant to MIL-STD-883, Class B - Standard Military Drawing #5962-87531, 5962-89666, 5962-89863 and 5962-89536 are listed on this function - Dual versions available in the TSSOP package. For more information, see IDT7280/7281/7282 data sheet IDT7280 = 2 x IDT7200 IDT7281 = 2 x IDT7201 IDT7282 = 2 x IDT7202 - Industrial temperature range (- 40o C to +85o C) is available (plastic packages only) - Green parts available, see ordering information DESCRIPTION: The IDT7200/7201/7202 are dual-port memories that load and empty data on a first-in/first-out basis. The devices use Full and Empty flags to prevent data overflow and underflow and expansion logic to allow for unlimited expansion capability in both word size and depth. The reads and writes are internally sequential through the use of ring pointers, with no address information required to load and unload data. Data is toggled in and out of the devices through the use of the Write (W) and Read (R) pins. The devices utilize a 9-bit wide data array to allow for control and parity bits at the user’s option. This feature is especially useful in data munications applications where it is necessary to use a parity bit for transmission/reception error checking. It also Features a Retransmit (RT) capability that...