IDT72205LB - CMOS SyncFIFO

Product Overview

Renesas

Datasheet Details

Part number	IDT72205LB
Manufacturer	Renesas
File Size	274.85 KB
Description	CMOS SyncFIFO
Datasheet	IDT72205LB Datasheet
Additional preview pages of the IDT72205LB datasheet.

Product details

Description

The IDT72205LB/72215LB/72225LB/72235LB/72245LB are very high speed, low-power First-In, First-Out (FIFO) memories with clocked read and write controls.These FIFOs are applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication.These FIFOs have 18-bit input and output ports.The input port is controlled by a free-running clock (WCLK), and an input enable pin (WEN).Data is read into the synchronous FIFO

Features

256 x 18-bit organization array (IDT72205LB).
512 x 18-bit organization array (IDT72215LB).
1,024 x 18-bit organization array (IDT72225LB).
2,048 x 18-bit organization array (IDT72235LB).
4,096 x 18-bit organization array (IDT72245LB).
10 ns read/write cycle time.
Empy and Full flags signal FIFO status.
Easy expandable in depth and width.
Asynchronous or coincident read and write clocks.
Programmable Almo.

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Other Datasheets by Renesas

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Published: Jan 19, 2020 |