IDT72241 Datasheet | Renesas

CMOS Sync FIFO™ IDT72421, IDT72201 64 x 9, 256 x 9, 512 x 9, IDT72211, IDT72221 1,024 x 9, 2,048 x 9, IDT72231, IDT72241 4,096 x 9 and 8,192 x 9 IDT72251 LEAD FINISH (Sn Pb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018 Features : - 64 x 9-bit organization (IDT72421) - 256 x 9-bit organization (IDT72201) - 512 x 9-bit organization (IDT72211) - 1,024 x 9-bit organization (IDT72221) - 2,048 x 9-bit organization (IDT72231) - 4,096 x 9-bit organization (IDT72241) - 8,192 x 9-bit organization (IDT72251) - 10 ns read/write cycle time - Read and Write Clocks can be independent - Dual-Ported zero fall-through time architecture - Empty and Full Flags signal FIFO status - Programmable Almost-Empty and Almost-Full flags can be set to any depth - Programmable Almost-Empty and Almost-Full flags default to Empty+7, and Full-7, respectively - Output enable puts output data bus in high-impedance state - Advanced submicron CMOS technology - Available in the 32-pin plastic leaded chip carrier (PLCC) and 32-pin Thin Quad Flat Pack...