IDT72V8981 Datasheet | Renesas

3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128 Features : - 128 x 128 channel non-blocking switch - Serial Tele Bus patible (ST-BUS®) - 4 RX inputs- 32 channels at 64 Kbit/s per serial line - 4 TX output- 32 channels at 64 Kbit/s per serial line - Three-state serial outputs - Microprocessor Interface (8-bit data bus) - 3.3V Power Supply - Available in 44-pin Plastic Leaded Chip Carrier (PLCC), and 44-pin Plastic Quad Flatpack (PQFP) - Operating Temperature Range -40°C to +85°C - 3.3V I/O with 5V Tolerant Inputs DESCRIPTION: The IDT72V8981 is a ST-BUS® patible digital switch controlled by a microprocessor. The IDT72V8981 can handle as many as 128, 64 Kbit/s input and output channels. Those 128 channels are divided into 4 serial inputs and outputs, each of which consists of 32 channels (64 Kbit/s per channel) to form a multiplexed 2.048 Mb/s stream. FUNCTIONAL DESCRIPTION A functional block diagram of the IDT72V8981 device is shown below. The serial streams operate continuously at 2.048 Mb/s and are arranged in 125µs wide frames each containing 32, 8-bit channels. Four input (RX0-3) and four output (TX0-3) serial streams are provided in the IDT72V8981 device allowing a plete 128 x 128 channel non-blocking switch matrix to be constructed. The serial interface clock (C4i) for the device is 4.096 MHz. The received serial data is internally converted to a parallel format by the on chip serial-to-parallel converters and stored sequentially in a 128-position Data Memory. By using an internal counter that is reset by the input 8 KHz frame pulse, F0i, the ining serial data streams can be framed and sequentially addressed. Data to be output on the serial streams may e from two sources: Data Memory or Connection Memory. The Connection Memory is 16 bits wide and FUNCTIONAL BLOCK DIAGRAM C4i F0i VCC GND Timing Unit Output MUX RX0 Receive RX1 Serial...