IDT74ALVCH162245 Datasheet | Renesas

IDT74ALVCH162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS AND BUS-HOLD INDUSTRIAL TEMPERATURE RANGE Features : - 0.5 MICRON CMOS Technology - Typical t SK(o) (Output Skew) < 250ps - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200p F, R = 0) - VCC = 3.3V ± 0.3V, Normal Range - VCC = 2.7V to 3.6V, Extended Range - VCC = 2.5V ± 0.2V - CMOS power levels (0.4μ W typ. static) - Rail-to-Rail output swing for increased noise margin - Available in TSSOP package DRIVE Features : - Balanced Output Drivers: ±12m A (A port) - High Output Drivers: ±24m A (B port) APPLICATIONS: - 3.3V high speed systems - 3.3V and lower voltage puting systems DESCRIPTION: This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVCH162245 is designed for asynchronous munication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The ALVCH162245 has series resistors in the device out-put structure of the “A” port which will significantly reduce line noise when used with light loads. This driver has been designed to drive ±12m A at the designated threshold levels. The “B” port has a ±24m A driver. The ALVCH162245 has “bus-hold” which retains the inputs’ last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. FUNCTIONAL BLOCK DIAGRAM 1DIR 1 1A1 47 1A2 46 1A3 44 1A4 43 1A5 41 1A6 40 1A7 38 1A8 37 IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. INDUSTRIAL...