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IDT74ALVCH16721 - 20-bit flip-flop

General Description

This 20-bit flip-flop is built using advanced dual metal CMOS technology.

The 20 flip-flops of the ALVCH16721 are edge-triggered D-type flip-flops with qualified clock storage.

Key Features

  • 0.5 MICRON CMOS Technology.
  • Typical tSK(o) (Output Skew) < 250ps.
  • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0).
  • VCC = 3.3V ± 0.3V, Normal Range.
  • VCC = 2.7V to 3.6V, Extended Range.
  • VCC = 2.5V ± 0.2V.
  • CMOS power levels (0.4μ W typ. static).
  • Rail-to-Rail output swing for increased noise margin.
  • Available in TSSOP package DRIVE.

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📁 Similar Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IDT74ALVCH16721 3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS 3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD INDUSTRIAL TEMPERATURE RANGE IDT74ALVCH16721 FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ. static) • Rail-to-Rail output swing for increased noise margin • Available in TSSOP package DRIVE FEATURES: • High Output Drivers: ±24mA • Low switching noise APPLICATIONS: • 3.3V high speed systems • 3.3V and lower voltage computing systems DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology.