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IDT82V3002A Datasheet Wan Pll

Manufacturer: Renesas

Overview: WAN PLL WITH DUAL REFERENCE INPUTS IDT82V3002A.

General Description

The IDT82V3002A is a WAN PLL with dual reference inputs.

It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference.

The IDT82V3002A provides eight types of clock signals (C1.5o, C3o, C6o, C2o, C4o, C8o, C16o, C32o) and six types of framing signals (F0o, F8o, F16o, F32o, RSP, TSP) for the multitrunk T1 and E1 primary rate transmission links.

Key Features

  • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces.
  • Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces.
  • Supports ITU-T G.812 Type IV clocks for 1544 kbit/s interface and 2048 kbit/s interfaces.
  • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface.
  • Selectable input reference signal: 8 kHz, 1.544 MHz or 2.048 MHz.
  • Accepts reference inputs fr.

Similar Datasheet

Brand Logo Part Number Description Manufacturer
Integrated Device Technology Logo IDT82V3002A WAN PLL Integrated Device Technology

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IDT82V3002A Distributor